A modern application specific integrated circuit (ASIC) must meet very stringent design and performance specifications. One example of an ASIC is a circuit element referred to as a serializer/deserializer (SERDES). As its name implies, a SERDES converts a parallel bit stream to a high speed serial bit stream, transmits it across a channel, then the serial bit stream is converted back to a parallel bit stream. A typical SERDES is organized into blocks of transmitters and receivers having digital to analog conversion (DAC) functionality and analog to digital conversion (ADC) functionality. Normally, the receivers and transmitters operate on differential signals. Differential signals are those that are represented by two complementary signals on different conductors, with the term “differential” representing the difference between the two complementary signals. All differential signals also have what is referred to as a “common mode,” which represents the average of the two differential signals. High-speed differential signaling offers many advantages, such as low noise and low power while providing a robust and high-speed data transmission.
Typically, it is desirable that high-speed differential input/output circuits (also referred to as input/output buffers, receiver/transmitter circuits, or receiver/driver circuits) use some form of differential and common mode termination (e.g., a resistive load) to match the differential impedance of the transmission medium (or channel). The transmission medium (e.g., printed-circuit board traces, transmission lines, backplanes, a differential wire pair, or cables) couples the transmitter output circuit to the receiver input circuit and provides a path along which the intended information travels.
In the past, a SERDES receiver was implemented using an external alternating current (AC) coupling capacitor. This is primarily done to isolate the DC signal levels between transmit and receive portions of the circuitry. The external AC coupling capacitor was connected to the transmission medium that connected the SERDES transmitter circuitry to the SERDES receiver circuitry. The external AC coupling capacitor had a typical value on the order of 10-100 nanofarads (nF). However, these external AC coupling capacitors contribute to parasitic losses and it is preferable to have them fabricated as part of the SERDES circuitry. However, an external AC coupling capacitor is generally too large to integrate onto the die using the same process used to fabricate the chip and is therefore typically located on a circuit board that houses the transmission medium.
Unfortunately, integrating an AC coupling capacitor having a value on the order of 10-100 nanofarads (nF) is very difficult using modern SERDES integrated circuit processing technologies. Making an internal AC coupling capacitor that can be fabricated as part of the die or chip presents design limitations due to the size and parasitic limitations of the capacitor. Moreover, these drawbacks become more pronounced when attempting to design and fabricate a receiver that can operate using both PAM 2 and PAM 4 modalities. The acronym PAM refers to pulse amplitude modulation, which is a form of signal modulation where the message information is encoded into the amplitude of a series of signal pulses. PAM is an analog pulse modulation scheme in which the amplitude of a train of carrier pulses is varied according to the sample value of the message signal. A PAM 2 communication modality refers to a modulator that takes one bit at a time and maps the signal amplitude to one of two possible levels (two symbols), for example −1 volt and 1 volt. A PAM 4 communication modality refers to a modulator that takes two bits at a time and maps the signal amplitude to one of four possible levels (four symbols), for example −3 volts, −1 volt, 1 volt, and 3 volts. For a given baud rate, PAM-4 modulation can transmit up to twice the number of bits as PAM-2 modulation.
FIG. 1 is a schematic diagram illustrating a conventional transmit driver and receiver termination network. The network 1 comprises a transmit (TX) portion 2 and a receive (RX) portion 4 connected by a transmission medium 21 comprising transmission line segments 22, 23, 24 and 25. In an embodiment, the transmission line segments 22, 23, 24 and 25 are adapted to transfer a differential signal. The transmit portion 2 comprises a transmit driver 6 and a transmit driver 8. The transmit drivers 6 and 8 deliver a differential transmit signal to resistors 7 and 9, respectively.
The output of the resistor 7 is provided to a transmission line segment 22 and the output of the resistor 9 is provided to a transmission line segment 24. The characteristic impedance of the transmission line segments is “Z0” and in an embodiment, can be 50 ohms. The transmission line segments 22 and 23 are connected by a capacitor 15 and the transmission line segments 24 and 25 are connected by a capacitor 16. The transmission line segments 24 and 25 also have a characteristic impedance of 50 ohms.
The signal INP is the positive transmit signal, also referred to as an input signal, provided to a receiver 13. The signal INN is the negative transmit signal, also referred to as an input signal, provided to a receiver 14. The terms “positive” and “negative” are relative because the signals INP and INN represent the components of a differential signal that exist around the common mode voltage, Vcm. A receiver termination resistor 11 terminates the INP signal to an AC ground; and a receiver termination resistor 12 terminates the INN signal to an AC ground. The values of the resistors 7, 9, 11 and 12 are chosen to represent the impedance of the transmission medium 21, comprising transmission line segments 22, 23, 24 and 25, respectively, which separate the transmit portion 2 from the receive portion 4 by a distance. The external AC coupling capacitors 15 and 16 are inserted into the transmission medium 21 to isolate the DC signal levels between transmit and receive circuitry, but create discontinuities in the transmission medium 21. In an embodiment, the value of each resistor 11 and 12 is nominally 50 ohms and the value of the external AC coupling capacitors is on the order of 10-100 nF.
FIG. 2 is a diagram illustrating an output signal of the transmitter drivers of FIG. 1. The output signal from the transmit drivers 6 and 8 is one where the common mode voltage is Vcm and is measured at the receiver inputs as:
                              V          ⁢                                          ⁢          C          ⁢                                          ⁢          M                =                                            I              ⁢                                                          ⁢              N              ⁢                                                          ⁢              N                        +                          I              ⁢                                                          ⁢              N              ⁢                                                          ⁢              P                                2                                    Eq        .                                  ⁢        1            
The external capacitors 15 and 16 create discontinuities in the transmission medium 21 and therefore, create noise in the system. This is in addition to the area, cost, and routability of inserting these “large” external AC caps into the system.
Therefore, it would be desirable to have a way to fabricate an internal AC coupling capacitor onto a SERDES receiver circuit.